PIC16F873T-04E/SO【PDF 41/218 页】IC MCU FLASH 4KX14 EE 28SOIC

收藏本站

您好，
买卖IC网欢迎您。
请登录
免费注册

买卖IC网

Sheet目录3889

37页 38页 39页 40页 [41页]42页 43页 44页 45页

2001 Microchip Technology Inc.

DS30292C-page 133

PIC16F87X

FIGURE 12-11:

WAKE-UP FROM SLEEP THROUGH INTERRUPT

12.14 In-Circuit Debugger

When the DEBUG bit in the configuration word is pro-

grammed to a ’0’, the In-Circuit Debugger functionality

is enabled. This function allows simple debugging func-

tions when used with MPLAB ICD. When the micro-

controller has this feature enabled, some of the

resources are not available for general use. Table 12-8

shows which features are consumed by the back-

ground debugger.

TABLE 12-8:

DEBUGGER RESOURCES

To use the In-Circuit Debugger function of the micro-

controller, the design must implement In-Circuit Serial

Programming connections to MCLR/VPP, VDD, GND,

RB7 and RB6. This will interface to the In-Circuit

Debugger module available from Microchip, or one of

the third party development tool companies.

12.15 Program Verification/Code

Protection

If the code protection bit(s) have not been pro-

grammed, the on-chip program memory can be read

out for verification purposes.

12.16 ID Locations

Four memory locations (2000h - 2003h) are designated

as ID locations, where the user can store checksum or

other code identification numbers. These locations are

not accessible during normal execution, but are read-

able and writable during program/verify. It is recom-

mended that only the 4 Least Significant bits of the ID

location are used.

Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1

Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4

OSC1

CLKOUT(4)

INT pin

INTF Flag

(INTCON<1>)

GIE bit

(INTCON<7>)

INSTRUCTION FLOW

Instruction

Fetched

Instruction

Executed

PC+1

PC+2

Inst(PC) = SLEEP

Inst(PC - 1)

Inst(PC + 1)

SLEEP

Processor in

SLEEP

Interrupt Latency(2)

Inst(PC + 2)

Inst(PC + 1)

Inst(0004h)

Inst(0005h)

Inst(0004h)

Dummy cycle

PC + 2

0004h

0005h

Dummy cycle

TOST(2)

PC+2

Note 1: XT, HS or LP oscillator mode assumed.

2: TOST = 1024TOSC (drawing not to scale) This delay will not be there for RC osc mode.

3: GIE = ’1’ assumed. In this case, after wake- up, the processor jumps to the interrupt routine.

If GIE = ’0’, execution will continue in-line.

4: CLKOUT is not available in these osc modes, but shown here for timing reference.

I/O pins

RB6, RB7

Stack

1 level

Program Memory

Address 0000h must be NOP

Last 100h words

Data Memory

0x070 (0x0F0, 0x170, 0x1F0)

0x1EB - 0x1EF

发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

*型号	*数量	厂商	批号	封装

添加更多采购

采购需求

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

我的联系方式